反向偏置

反向偏置电压越大，产生相同倍增电流输出所需要的时间越短，雪崩倍增的强度也越大。

The Larger the reverse bias voltage , the shorter the time required to produce the same output current ; the larger the avalanche multiplication .

APD的增益可以由反向偏置电压的幅度来控制。

The gain of the APD can be controlled by the magnitude of the reverse bias voltage .

采用二维有限元数值分析的方法，开发了用于反向偏置p－n结分析的模拟软件，可以模拟与MOS型功率器件反向耐压有关的终端浅结场环、场板、SiO2介质及界面态。

By using two-dimensional finite-element numerical analysis , we develop a computer simulation program used for terminal field calculation of reverse biased p-n junctions .

小正斜角造型大功率硅整流管在反向偏置下，表面耗尽区在稳态光电导下的扩展几乎都是在低掺杂的n区进行，p区的扩展被“钉扎”。

For small positive angle bevelled power diode under reverse biased voltage , the surface depletion region extension is almost in the low doped n region , the extension in p region seems to be pinched .

PIN二极管开关展宽频带的方法一般是把PIN二极管结合进短截线滤波器，使PIN二极管在反向偏置时作为滤波器的组成部分，以展宽开关在传输状态下的频带；

The usual method to broaden the bandwidth of the PIN diode switch is combining the PIN diodes with stub filters : when under reverse bias , the didoe is part of the filter , the transmission bandwidth is broadened ;

硅外延层上的自然氧化层中的界面态，使汞硅接触肖特基二极管反向偏置CV特性偏离理想情况，给外延层杂质纵向浓度分布测定带来较大误差。

The interface states in the native oxide film on silicon epitaxial layer cause the C-V characteristics of mercury-silicon contacting Schottky diode to depart from the ideal condition and make a great error in measurement of the profile of impurities in P / P ~ + epitaxial layer .

当反向偏置形成时，半导体的连接点会有反向击穿电压。

Semiconductor junctions have a " reverse breakdown voltage " at which a reverse-biased junction begins to conduct .

这种叫做反向偏置的状态不利于电流穿越结。

This condition , known as reverse bias , is not conducive to current flow through the junction .

衡量二极管质量的一个方面就是在规定的反向偏置电压下的泄漏电流。

One measure of the quality of a diode is its leakage current at a specified reverse bias voltage .

反向偏置的收集结允许空穴和阻挡电子通过。

The reverse-biased collector junction allows holes to pass it , but does not allow electrons to pass it .

分析了反向偏置电压和调制深度对于脉冲宽度和消光比的影响，对驱动参数进行了优化；

The effects of DC reverse bias voltage and modulation intensity on pulse duration and extinction ratio were discussed .

在基极-发射极反向偏置的条件下，研究了应力作用时间与器件参数的退化关系。

The relation of stress time to parameter degradation is investigated under the condition of reverse bias of base-emitter junction .

反向偏置时，有效势垒高度因界面层及界面态的存在而有所改变，并且随外加电压而变化；

At reverse bias , the effective barrier height alters due to the presence of interface layer and states and changes with variation of voltage ;

一个高反向偏置电压产生一个强有力的内部电场，加速了通过硅晶格的电子，并通过碰撞电离产生二次电子。

A high reverse bias voltage creates a strong internal electric field , which accelerates the electrons through the silicon crystal lattice and produces secondary electrons by impact ionization .

通过改变模型中入射光强度和频率、反向偏置电压、负载电阻和分布电容的设置，分析了电路中输出电流、输出电压和死时间的变化情况。

The output current , output voltage and dead time were analyzed with respect to the change of incident light intensity and frequency , reverse bias voltage , load resistance and parasitic capacitance .