上电复位

本文第三章设计了解码芯片的部分电路模块，包括振荡器电路、上电复位电路、施密特触发器电路、数据检测模块、型号控制逻辑模块、按键防抖动模块以及数据输出逻辑模块。

Chapter 3 principally analyses the key problems in the design of decoder , which includes RC oscillator , POR ( Power-on Reset ), Schmitt trigger , data detect module , model control logic module and data output logic module , then gate simulation is completed by Verilog_XL tool .

保证可编程芯片和单片机上电复位信号时序正确的两种方法在八年级时，盖茨和两位朋友用电脑为学校编写了花名册程序。

The two methods that make the correct POR time sequence In the eighth grade , Gates and two friends wrote a computerized payroll program for their school .

在基于DSP的系统设计中，为了保证掉电时程序不丢失，总是将程序保存在非易失性存储器中，以便系统在上电复位时可将其引导到DSP内部的RAM中执行。

In the system design of DSP , the program is always preserved in nonvolatile memory to avoid losing the program once power is off .

带有上电复位功能，即把DAC寄存器复位至全零。

With a power-on reset functions , namely , the DAC registers reset to all zeroes .

系统上电复位后，BSP的初始化部分开始执行，在CPU初始化，板上硬件初始化，操作系统组件初始化后，开始将控制权转交给操作系统，启动多任务调度来管理整个系统。

After system power on , the BSP start the initialization of CPU , hardware in system . Operating system .

随着芯片的集成度越来越高，在以SoC为发展趋势的集成电路设计中，如何实现上电复位电路的片内集成将成为保证系统芯片正常复位的关键问题。

With the fast development of IC integration , how to implement on-chip power-on reset circuit becomes one key issue to guarantee normal reset of SoC .

文章从单片机实际上电过程的分析入手，从上电复位和噪声复位两个侧面，介绍了迟滞鉴幅式CPU复位电路的工作原理、设计方法和调试过程，该电路具有较高的实用性。

, switch on reset and noisy reset , introduces principles , design methods and debugging of reset circuit for lag amplitude discriminating CPU . This circuit is relatively practicable .

重点对物理层上电复位过程、链路层CRC校验、加扰模块、链路层状态机转换等过程的实现进行了分析说明。

The realization of the reset process on the physical layer , CRC module and the state machine conversion process on the link layer , scrambling module are analyzed and illuminated .

首先介绍了在嵌入式系统中，CPU和可编程芯片上电复位电路不仅要满足复位时间要求，而且还要有正确的时序，保证在对可编程芯片初始化时，该芯片上电复位已经结束。

At first , we point out that in the embedded system the power-on reset ( POR ) circuit of CPU and EPLD should not only satisfied the request of reset time but also offer correct time sequence to make POR step finished when initializing EPLD .

根据系统功能强，程序大的特点以及软件升级便利的要求，以Flash存储器作为用户代码的存储介质，在DSP上电复位时再将用户程序加载到SRAM中运行。

According to system specialty of strong function and large program and the request of upgrade convenience , flash memory is used as storage medium , when DSP is powered up and reset , the user code is loaded from flash memory into external SRAM to run .

一种基于比较器的新型片内上电复位电路的实现

A Novel On-chip Power-on Reset Circuit Based on Comparator

电子标签中的上电复位电路能够产生一个上电复位信号，提供给数字电路部分。

The chip also generates a Power on Reset signal for digital circuits .

基于电平检测的上电复位电路

Power on Reset Circuit Based on Voltage-Detected

8031单片机上电复位引出问题的解决

Solution of replacement in 8031 SCM

二位式芯片-微机微分型单片机上电复位电路的性能分析

Two-bit wide slice Analysis of performance of differential Type electrified reset circuit of single chip computer

采用程序上电复位后读取系统关键状态的方法提高了控制系统的抗干扰性和可靠性。

The reliability of control system is increased remarkably with reading system working status when the control system is starting .

建立了微分型单片机上电复位电路的数学模型，并在此基础上对其性能进行了分析。

In this paper , a mathematical model of differential-type electrified reset circuit of single chip computer had been established .

为了可以正确通过验证，首先要使处理器进行一次上电复位。

For the software to pass the security check properly , it MUST first cause the processor to undergo a Power-On Reset .

文章首先介绍了一种普遍使用的简单上电复位电路，在分析了其性能优点和缺点的基础上提出了一种新的基于比较器结构的上电复位电路。

This paper introduces a simple power-on reset circuit at first , then presents a novel on-chip circuit based on comparator after analysis and simulation of simple one , finally gives the compare of performance of these two circuits .