芯片测试

为了降低系统芯片测试成本，需复用IP的测试电路和测试矢量，过去几年已经涌现了许多新型测试结构。

Many novel testing structures for system-on-a-chip are proposed for decreasing testing cost and facilitating test reuse .

IC芯片测试设备机械抓手的速度测控

The Speed Measure and Control of Handler Test Machine

无人机控制系统RAM芯片测试方法研究

Research of Testing Method for RAM Chips Applied in UVA Control System

在平面光波器件（PLC）的研制过程中，芯片测试与设计和制作处于同等重要的地位。

Fiber-optic test and measurement on planar lightwave circuit components is the same important procedure as computation and fabrication .

着眼未来的LCD驱动芯片测试技术

Advanced Testing Technology for Developing LCD Driver IC

VLSI集成电路芯片测试技术正在向高层次测试推进。

The VLSI testing is being pushed to the high-level based technology .

星载降水测量雷达综合测试设备研制IC芯片测试设备机械抓手的速度测控

Design of Integrated Test Equipment for Precipitation Measurement Radar The Speed Measure and Control of Handler Test Machine

基于边界扫描技术的VLSI芯片测试系统的设计与实现

Design and Implementation of a VLSI Chip Test System Based on Boundary-Scan Test

Wrapper扫描链均衡与系统芯片测试调度的联合优化算法

Wrapper Scan Chain Balance and Test Scheduling Co-optimization for Core-Based System-on-chip Test

最后阐述了芯片测试的DNA计算机算法研究的意义、现状、研究内容、研究方法等。

This article elaborated the chip testing DNA computer algorithm research significance , the present situation , the research content , the research technique and so on .

VLSI芯片测试中用户辅助硬件误差的消除方法

Method of Eliminating Error Caused by User 's Aid-hardware during the Test of VLSI Chip

在集成电路（Integratedcircuit，IC）产业中，芯片测试贯穿IC设计、生产、封装和应用的全过程。

IC ( Integrated Circuit ) test is an indispensable part of IC design , fabrication , encapsulation and application in the field of IC industrial .

基于Quartet测试系统的高速DAC芯片测试

Testing of High Speed DAC Chipset by using Test System Quartet

LED芯片测试与分拣系统含有众多位置伺服系统，高性能的位置伺服系统是LED芯片检测与分拣的关键技术之一。

LED die testing and sorting system includes a number of position servo systems , high-performance position servo system is one of the key technologies in the system .

AVS解码器芯片测试的研究

Research on the Testing of AVS Decoder Chip

芯片测试结果表明，两个VCO均能正常工作，辐射测试工作正在准备。

Practical tests indicate that the two VCOs work well , and the preparation for radiation tests is on the way .

文章分析了基于测试总线的芯片测试结构，详细阐述了SOC设计中测试调度的概念，给出了一种能够灵活实现各种测试调度结果的芯片测试控制器的设计。

A chip test architecture based on test bus is analyzed in the paper , and test scheduling in SOC is explained . Finally , the design of the chip test controller is presented , which is capable of carrying out test scheduling .

介绍了一种高速7位DAC的设计及芯片测试结果，该DAC选取高5位单位电流源，低2位二进制电流源的分段结构。

This paper describes the design and the test results of a 7-bit high-speed CMOS DAC , which is implemented using a segmented architecture with 5 MSBs in unary way and 2 ( LSBs ) in binary way .

在凯雷（Carlyle）收购台湾日月光半导体制造股份有限公司（ASE）的努力落空后，预计私人股本基金将重新审视自己尝试收购台湾上市公司的做法。日月光半导体是全球最大的芯片测试和封装企业。

Private equity funds are expected to re-examine their attempts to buy out Taiwanese listed companies after the collapse of Carlyle 's attempt to acquire Advanced Semiconductor Engineering , the world 's largest chip testing and packaging company .

为了压缩测试向量并降低芯片测试成本，本文提出了一种新的基于最小相关度扫描链的多捕获（Multi-capture）测试结构。

A Multi-capture scan testing based on Minimum Relativity chain structure is proposed in this paper to compact the larger and larger test patterns .

完成了芯片测试电路的设计，使芯片在10MHz时钟频率下工作测试，结果表明芯片工作稳定。

After the test circuit was completed . the chip was tested under 10 MHz clock frequency , and the results show that the chip works steadily .

中国最大的芯片测试企业——江苏长电科技（JCET）已发出要约，拟以7.8亿美元现金收购淡马锡（Temasek）在新加坡星科金朋（StatsChipPac）所持的83%股权。这是中国半导体集团迄今在海外发起的最大收购举措。

Jiangsu Changjiang Electronics Technology , China 's biggest chip tester , has made an offer to buy Temasek 's 83 per cent stake in Singapore-based Stats ChipPac for $ 780m in cash in the largest ever move by a Chinese semiconductor group overseas .

芯片测试表明，该滤波器对128倍过采样率、2阶∑-Δ调制器的输出码流进行处理得到的信噪比为75db。

By processing the bit stream from a 2-level Σ - Δ modulator with an oversampling ratio of 128 , a signal-to-noise ratio of 75 dB is obtained for the filter .

基于数据切片的系统芯片测试控制技术研究

Study on Test Control for System-on-a-Chip Based on Test Data Slicing

文章按照电路设计、版图设计、工艺流片到芯片测试的顺序详细介绍了上述电路的设计过程及最终的测试结果。

Subsequently the design procedure and test results are presented .

这二个芯片测试结果与理论分析基本一致。

The measurement result of chips is consistent with the theory analyze .

系统级芯片测试调度最优总线指定方法

Optimal bus assignment scheme for system on chip test scheduling

芯片测试结果验证了相关理论分析和电路实现的有效性。

Measurement results conform to the theoretical analysis and circuit simulation results .

芯片测试结果显示芯片性能优异，达到预期的设计要求。

Test results show an excellent performance of the chip .

该芯片测试结果基本达到预设指标。

Test result shows that the chip has achieved the design target .