像素时钟信号

  • 网络Pixel clock signal;PCLK;DCLK;VCLK
像素时钟信号像素时钟信号
  1. 首先,我们对像素级A/D转换型图像传感器的系统工作原理进行了分析,是由像素阵列、时钟信号产生器和SAM(顺序读写存储器)三部分构成的。

    The first , we analyze the system operation theory of CMOS image sensor with pixel level ADC ( A / D Converter ) . It is made up of three sections : pixel array , clock signal generator and SAM ( Sequential Access Memory ) .