逻辑地址
- 名logic address
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调用程序逻辑地址空间
Caller 's logic address space
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一个逻辑地址包含了段寄存器的说明符及偏移量
A logical address consists of a segment register specifier and offset .
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X微处理器使用不同的存储机制,将逻辑地址映射到物理地址空间。
It adopts a variety of memory management techniques to map a logical address to a physical one .
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逻辑地址&由CPU产生;也叫做虚拟空间。
Logical address – generated by the CPU ; also referred to as virtual address .
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所有URI地址在一个逻辑地址空间中统一管理。
All URI addresses are managed within a logical address space .
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这些参数有逻辑地址、远程地址、要传输的字节个数、一个通道以及所执行的命令(在本例中是GET)。
The arguments are the local address , the remote address , the number of bytes to transmit , a channel , and the command to perform ( in this case , GET ) .
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此外,逻辑地址到物理地址的映射操作将消耗大量CPU资源,操作时间会变长。
In addition , the operation to map logical addresses to physical addresses consumes significant CPU resources and takes longer .
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IP地址是每个TCP/IP宿主机的逻辑地址标识,用来唯一标识INTERNET网络中的节点。
A IP address is a mark of logical address for every hosts of TCP / IP , and it is to uniquely a node within INTERNET .
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Striping方式下磁盘逻辑地址到物理地址的转换
Logical to physical Address Conversion on the Disk With Striping Patterns
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相反,NetKernelAPI提供一个局部的内部逻辑地址空间来处理请求参数。
Instead the NetKernel Foundation API provides a local internal logical address space for the arguments of a request .
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当开启地址转换时,VMM将请求Hypervisor将虚拟地址转换为正确的逻辑地址。
When address translation is turned on , the VMM requests the hypervisor to convert a virtual address to a correct logical address .
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下面的模块定义将逻辑地址“ffcpl:/helloworld”映射到accessor,即HelloWorld对象。
The following entry in a module definition maps the logical address " ffcpl : / helloworld " to our accessor , the HelloWorld object .
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在获得系统范围的物理地址(PMB)之后,Hypervisor将它转换为分区相应的有效逻辑地址(LMB)。
After obtaining the system-wide physical address ( PMB ), the hypervisor translates this to the corresponding valid logical address ( LMB ) for the partition .
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模块就是一个封装的、私有的逻辑地址空间。
A module is an encapsulated private logical address space .
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建立一个页表,把逻辑地址转换为物理地址。
Set up a page table to translate logical to physical addresses .
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在逻辑地址空间我们拥有了更大的自由。
In the logical address space we have new degrees of freedom .
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在系统设计上采用了全局逻辑地址空间,使得本系统适用于公众的网络存储服务;
The global address is adopted to meet with public network storage service ;
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从其他模块中导入逻辑地址空间
Import a logical address space from another module
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将逻辑地址映射为物理端点
Map a logical address to physical endpoint
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用户程序所对应到的是逻辑地址,物理地址对它从来都不可见。
The user program deals with logical addresses ; it never sees the real physical addresses .
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这些值定义了中断或异常处理函数的第一条指令的逻辑地址。
These values define the logical address of the first instruction of the interrupt or exception handler .
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进程的逻辑地址空间可能是不连续的,如果有可用的物理内存,它将分给进程。
Logical address space of a process can be noncontiguous ; process is allocated physical memory whenever the latter is available .
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目的地是一些可以具有服务端点、队列或者主题的行为的逻辑地址。
Destinations are logical addresses which can have the behavior of a service endpoint , a queue , or a topic .
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“有效”表明相关的页在进程的逻辑地址空间,以及是一个合法的页。
" valid " indicates that the associated page is in the process'logical address space , and is thus a legal page .
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逻辑地址空间的概念同物理地址空间想关联,它是正确内存管理的中心。
The concept of a logical address space that is bound to a separate physical address space is central to proper memory management .
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同时作为一个可以独立部署的包,模块也定义了资源的逻辑地址空间以及它们与代码之间的关系。
As well as being a physical package for deployment , a module defines the logical address space for resources and their relationship to physical code .
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可能由于短区段而增加操作时间的操作包括:查找区段、逻辑地址到物理地址的映射、轻量扫描、存档、预读、以及检查点刷新。
The operations that may take longer with short extents include : finding extents , mapping logical to physical addresses , light scans , archives , read-ahead , and checkpoint flush .
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模型扩展了传统CORBA的寻址方式,定义了逻辑对象地址,能够支持松耦合应用的对象迁移,提高了对象定位的透明性;
The model extends the traditional CORBA addressing way , defines a kind of logic object address , which can support object migration of loosely coupled application and increase transparency of object location ;
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在写数据时,主机总线适配器(HBA)根据块数据和逻辑块地址生成DIF。
On a write , the DIF is generated by the host bus adapter ( HBA ), based on the block data and logical block address .
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用数据选择器进行逻辑设计地址变量的优化
Optimization about address variable in design of logic circuit by demultiplexer