动态存储器
- 名Dynamic memory;dynamic storage
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区段相联缓冲存储器动态存储分配;动态存储器分配;动态存储区分配
Sector associative buffer storage dynamic storage allocation
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动态存储分配;动态存储器分配;动态存储区分配湖南省洞庭湖区钉螺分布状态的动态分析
Dynamic storage allocation Dynamic study of the distribution of the Oncomelania hupensis in Dongting Lake Area , Hunan Province
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基于FPGA的双倍速率动态存储器设计
Design of Dual Rate Dynamic Memory Based on FPGA
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多隧道结单电子动态存储器的MonteCarlo模拟
Monte Carlo simulation of a multi-tunnel-junction single-electron dynamic memory
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基于MonteCarlo模拟的三种不同结构单电子动态存储器特性比较
Comparison of behaviors of three single-electron dynamic memories with different structures based on Monte Carlo simulation
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动态存储器(DRAM)是重要的存储器件,现场可编程门阵列(FPGA)在计算机硬件设计领域的应用也十分广泛。
DRAM is an important memory device , the application of FPGA is quite extensive in the area of hardware design .
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用大容量动态存储器以及双DSP硬件处理系统实现了大量数据缓存和实时信号处理,从而完成了对微弱信号截获的分析。
In this paper , a big capacity SDRAM matrix and dual-DSPs hardware are studied based on the mass data memory and processing in real time for the weak singal intercept and analysis .
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为了解决数据量庞大、高速数据存取的问题,本文采用了FPGA芯片和同步动态存储器(SDRAM)来实现矩阵转置运算。
For the problem of huge data storage , use SDRAM to store the data , and use FPGA to control SDRAM to complete the transpose .
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采用大容量、快速读写的动态存储器SDRAM作为数码曝光系统中图像数据的缓存,实现了高分辨率图像的静态显示;
Fast read-write RAM device SDRAM which has a large amount of memory space is the image data storage buffer of this system .
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在模/数转换器、数/模转换器、动态存储器、Flash存储器等集成电路设计中,低温度系数、低压低功耗、高电源抑制比的基准源设计是十分关键的。
Design of Reference resource of low temperature coefficient , low voltage , low power and high PSRR is completely pivotal in IC design of ADC , DAC , Dynamic Memory , Flash Memory and so on .
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其中,FPGA要实现图像采集、计算和输出等功能,实现与图像采集芯片、图像输出芯片、PCI桥芯片、动态存储器的高效接口。
In the card , the FPGA must realize image collection , calculation , image output . It should realize the interface with the chips such as image collection , image output PCI bridge and DDR RAM .
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系统20MByte的大容量数据缓冲区(每通道10MByte),由动态存储器(DRAM)构成。
There is a very big data buffer , 20M Byte in total ( 10M Byte per Channel ), in the system , which is designed with DRAM .
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同时根据动态存储器的刷新特性,设计了异步FIFO,实现了A/D采样、DDR2内存芯片和DSP三者之间的数据传递。
According to the refresh characteristic of Dynamic Random Access Memory , the design uses asynchronous FIFO to achieve the data transfer through ADC , DDR2 memory chips and DSP clock domain .
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该卡是以高密度高性能的FPGA芯片为核心,图像采集芯片、图像输出芯片、PCI桥芯片、DDR动态存储器等为辅助的PCI扩展卡。
The card is PCI add card , comprised with the core chip , a high density high capability FPGA , and the Image collect chip , image output chip , PCI bridge chip and the DDR RAM .
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该系统采用了实时自适应ECG数据压缩算法(MFAN)、最优编码和大容量动态存储器等技术,可存储长达24小时的心电信号。
It can record and monitor ECG signal continuously up to 24 hours A real-time ECG compression algorithm ( MFAN ), DRAM technique and optimal coding method are presented .
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嵌入式数字频率合成系统动态存储器设计
Designing of Dynamic Storages by Digital Frequency Synthesis Based on Embed
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核医学数据获取动态存储器的设计
Design of dynamic memory in data acquisition of nuclear medicine
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动态存储器的内联结构
Interconnections of dynamic memories
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本文提出了一种动态存储器管理系统中存储器测试区域的确定方法,解决了程控交换机系统中存储器可测区域的确定问题。
A new method is presented in this paper for determination of RAM test range in a dynamic memory management system .
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动态存储器空间当做一个自由区间的大池子,可按每个程序的需要,准确地分配给它主存空间。
Using this technique , the available memory is treated as a large pool of free space , and each program is assigned exactly as much as it needs .
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除此之外,对于嵌入式动态存储器的高速需求,本论文设计了一个锁相环电路,产生一个稳定的时钟,便于其功能验证和自适应测试。
In addition , a PLL is designed for the high-speed embedded DRAM to create a stable clock which might be used to facilitate the functional verification and adaptive testing .
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动态随机存储器IC芯片制造技术的进展与展望
Advance and future prospect for fabricating technology of DRAM IC chips
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4KMOS动态随机存储器
A 4K MOS Dynamic Random-Access Memory
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这使它与常规动态随机存储器(DRAM)芯片一样处在同一个同盟之中。
That puts it in the same league as conventional dynamiC-RAM ( DRAM ) chips .
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最近几年,随着计算机硬件和软件的快速发展,对先进的计算动态随机存储器(DRAM)模块的要求一直在迅猛增长。
The demands of DRAM are increasing rapidly along with the fast development of the computer in recent years .
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因此高介电常数材料在微电子器件中,特别是在动态随机存储器(DRAM)中有着广泛的应用前景。
High-dielectric-constant oxides are very desirable for the application in microelectronics , especially for the application in dynamic random access memories ( DRAM ) devices .
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DDRSDRAM(双倍速同步动态随机存储器)作为SDRAM的升级版本,在高带宽解决方案中显示了它出色的性能。
As the updated version of the SDRAM , DDR SDRAM ( Double Data Rate Synchronous Dynamic Ram ) shows its excellent performance in high-bandwidth solutions .
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DDRSDRAM(DoubleDataRateSDRAM,双倍数据率同步动态随机存储器)以其高速率、大容量和良好的兼容性在这些需求存储设备的领域得到了相当广泛的应用。
DDR SDRAM ( Double Data Rate SDRAM , Double Data Rate Synchronous Dynamic Random Access Memory ) has been widely applied in these areas of demand for storage devices for its high-speed , large capacity and good compatibility .
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钛酸锶钡(BaxSr(1-x)TiO3,BST)薄膜具有优良的铁电、介电性能,在可调谐微波器件、动态随机存储器、红外探测器阵列等方面具有良好的应用前景。
Barium strontium titanate ( BST ) thin films possess good ferroelectric and dielectric properties . They are promising materials in application of tunable microwave devices , DRAMs , IR detector arrays and so on .
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同步动态随机存储器(SDRAM)具有高速,大容量,价格低廉等优点,因而成为缓冲存储器的首选,但是SDRAM控制时序比较复杂,不能与DSP直接接口,这极大地限制了它的广泛应用。
The SDRAM has become the chief choice of the buffer storage because of its high speed , great capacity , and low price ; but due to its complex control timing , it cannot directly interface with DSP .