微米技术

微米技术微米技术
  1. 随着微电子技术中的深亚微米技术的发展,嵌入式系统可以被集成到一块芯片上,形成片上系统SOC。

    With deep submicron technology , an embedded system can be integrated into a single chip and becomes " system on chip " for many applications .

  2. 近年来,随着电源电压的不断降低以及深亚微米技术带来的限制,功耗正成为限制流水线ADC工作性能的最大障碍。

    But in recent years , with the decreasing supply voltage and the constraint in deep submicron technology , power consumption is becoming the biggest obstacle of pipeline ADCs .

  3. 深亚微米技术、日益增加的复杂性、异构综合和不断缩短的产品上市时间等因素,使得专用集成芯片ASIC的设计遇到了前所未有的挑战。

    Such factors as deep-submicron effects , more and more complexity , urgent demand on time-to-market make ASIC ( Application Specific Integrated Circuits , ASIC ) face great challenge .

  4. 随着深亚微米技术的出现,现场可编程逻辑门阵列(FPGA)得到了迅猛发展,也使得可编程片上系统(SOPC)成为未来嵌入式系统设计技术发展的必然趋势。

    With the emergence of submicron technology , FPGA chips have developed rapidly , thus making the SOPC ( system on a programmable chip ) design the mainstream technique in embedded system design field .

  5. 深亚微米技术背景下,嵌入式存储器在片上系统芯片(system-on-a-chip,SoC)中占有越来越多的芯片面积,嵌入式存储器的测试正面临诸多新的挑战。

    Embedded memories consume an increasing portion of the die area in deep submicron system-on-a-chip ( SoC ) . New challenges now confronted the test of embedded memories .

  6. 随着深亚微米技术的不断演进,集成电路的结构和功能日益复杂,设计尺寸日益缩小,测试已成为一个越来越困难的问题,对IC设计的自动化和测试技术的要求十分强烈。

    With the development of the deep sub-micron technology , the complexity of IC structure and function has increased and the size of the transistor has decreased , which makes testing technology a more and more hard issue for IC designer .

  7. 半导体器件与集成电路制造中的亚微米技术

    Submicron technology used in manufacture of semiconductor devices and integrated circuits

  8. 随着深亚微米技术,串扰噪声问题越来越严重。

    With deep submicron technology , crosstalk noise becomes more and more serious .

  9. 铝互连线的电迁移问题及超深亚微米技术下的挑战

    Electromigration in Al interconnects and the challenges in ultra - deep submicron technology

  10. 随着纳米微米技术的发展,机械加工领域对精度的要求日益提高。

    With the development of nano-micron technology , demand of precision is increasing more and more in the field of machining .

  11. 随着深亚微米技术的发展,功耗已经成为现代超大规模集成电路设计中的一个主要设计约束。

    With the development of the deep sub-micron technology , the power consumption of the integrated circuit ( IC ) has become a dominant design constraint in modern VLSI design .

  12. 传统的基于共享总线连结和单元之间专用连线的解决方法,因为面临着小型化瓶颈,不再适合使用微米技术来实现。

    Traditional solutions , which were based on a combination of shared-buses and dedicated module-to-module wires , have hit their scalability limit , and are no longer adequate for sub-micron technologies .

  13. 随着深亚微米技术的应用,芯片的集成度大幅提高,但另一方面工艺制造过程中产生缺陷的概率也随之提高。

    With the application of very deep sub-micron technology , the density of chips increases greatly , but on the other hand it causes the defects during the manufacturing process rising .

  14. 近年来,各种新的电路仿真方法和仿真系统相继脱颖而出,并将取代那些传统的、已经无法适应深亚微米技术发展的电路仿真器。

    Novel methods and simulators have grown up one by one in recent years , and will supersede traditional circuit simulators which can not catch up with the development of deep submicron technology .

  15. 但台湾芯片制造商在大陆的工厂一直只能使用0.25微米技术。在台湾企业扩张的早期,这是大陆竞争对手所使用的标准技术。

    However , they have been restricted to processes using 0.25 micron in their mainland factories , which was the standard technology in use by mainland competitors in the earlier days of Taiwanese expansion .

  16. 作为逻辑设计和物理设计的桥梁,逻辑综合在超深亚微米技术阶段更加需要做到高效高质量。

    For VDSM ASIC designs , Logic synthesis , which is a bridge between logic design phase and physical design phase , should be more efficient and produce high quality of results at the same time .

  17. 上述项目于12月18日晚些时候获得批准。在这些项目中,两家存储芯片制造商受到了仅能使用0.25微米技术的限制,而该技术落后于中国大陆和国际竞争者已采用的制造工艺。

    In the projects approved late on Monday , the two memory chipmakers were restricted to 0.25 micron technology , which is less advanced than the manufacturing processes already being used by Chinese and international competitors .

  18. 随着集成电路发展到深亚微米技术时代,Cu/Low-k互连已经取代了Al/SiO2互连,铜互连是决定集成电路性能、可靠性、生产率和成本的重要因素。

    With the IC development to the era of deep submicron technology , Cu / Low-k interconnect has replaced Al / SiO2interconnect . Cu interconnect is an important factor to determine the IC performance , reliability , productivity and cost .

  19. 在深亚微米MOS技术中HC退化与ESD的相互作用

    The Interaction of HC Degradation and ESD in Deep Submicrometer MOS Technologies

  20. 首先,以RDX和Al粉作为原材料,研究了纳米/微米复合技术中的颗粒复合型材料的制备方法及其对复合材料的结构性能的影响。

    First , the grain composite technology was studied with the materials of RDX and Al powder .

  21. 述了深亚微米MOS技术中热载流子(HC)退化效应的机理。

    The principle of HC ( Hot carrier ) is reviewed first in deep submicrometer MOS technologies .

  22. 深亚微米工艺技术和基于IP核复用的系统芯片(SoC)设计技术给集成电路的设计和测试带来了很大挑战,大大增加了测试的难度和成本。

    Deep-sub-micron process technology and design methodology of SoC based on IP ( Intellectual Property ) reuse bring the great challenges to the design and testing of the integrated circuits .

  23. 文章对深亚微米各技术时代ULSI的发展历程中所遇到的一些材料、技术物理问题以及研究成果进行综述评论,跟踪微电子技术的发展进程。

    In this paper , the problems and research that technology physics faces during the development of ULSI in the technology times of sub - micron are summarized , the development of microelectronics are followed .

  24. 深亚微米隔离技术&浅沟槽隔离工艺

    Shallow Trench Isolation Process for Deep Sub - Micron Technologies

  25. 亚微米加工技术中的一个能量函数及其算法

    The Energy Function of Submicron Fabrication and Its Algorithm

  26. 利用该系统,实现了微小物体的非接触、高精度、自动测试,解决了微米加工技术中微小物体的尺寸测试问题。

    With the development of laser process technology and micro-machinery , the requirement of high accuracy , non-contact testing for micro-object is increasing .

  27. 同步辐射X射线光刻是一种很好的深亚微米图形复制技术。

    Synchrotron radiation x-ray lithography is a promising technique for replication of deep sub-micron pattern .

  28. 随着便携式电子产品和超深亚微米CMOS工艺技术的不断的发展,低电压、低功耗的模拟电路设计技术正成为研究的热点。

    With the development of portable electronic products and deep sub-micron CMOS process technology , low-voltage and low-power analog circuit design techniques are becoming research hotspot .

  29. 随着芯片设计进入超深亚微米和纳米技术领域,芯片的集成度越来越大,布线层数越来越多,P/G网的规模日益庞大复杂,P/G网上承载的电流也越来越大。

    With the chip design into the ultra-deep sub-micron and nano-technology domain , the integrity and metal layers of chip increase , P / G network becomes larger and more complex , and it carries bigger current .

  30. 微机电系统(MEMS)和纳机电系统(NEMS)是微米/纳米技术的重要组成部分。

    Micro Electro-mechanic Systems ( MEMS ) and Nano Electro-mechanic Systems ( NEMS ) are the important aspects of micron / nanometer technology .