编码器

基于IP核的加油机编码器芯片设计

Design of a Refueler Coder IC Based on IP Core

用DSP实现导频制立体声编码器

By The Use Of DSP To Realize Stereo Coder Based On Pilot Frequency

多探头K分割编码结构及循环码编码器研究

Research on Multi-probe K-partitioning Encoding Structure and an Encoder of Binary Cyclic Code

此外，所述上预测性编码器和下预测性编码器可有利地包括B帧和多重预测运动补偿。

Further , the top and bottom predictive coders can advantageously include B-frames and multiple prediction motion compensation .

基于光电编码器和PLC的车轮转角检测显示系统

A Wheel Angle Measuring and Displaying System Based on Photoelectric Encoder and PLC

位置编码器在铜挤压机PLC位置控制系统中的应用

Application of PLG in the copper alloy extrusion press PLC position control system

ActivityStreams标准的简单性使得我们很容易构建编码器。

The simplicity of the Activity Streams standard makes it easy to build an encoder .

基于双DSP结构的实时视频压缩编码器

A Real-time Video Compressing Coder Based-on Dual-DSP Structure

JPEG2000自适应算术编码器FPGA设计

FPGA Design of Adaptive Arithmetic Encoder for JPEG 2000

变参数RS编码器IP核的设计与实现

The IP Core Design for Varied Parameters RS Encoder

基于FPGA的旋转编码器抗抖动四倍频电路设计

The Anti-jitter Fourfold Frequency Multiplication Circuit Design of a Rotary Encoder Based on FPGA

讨论了高速RS码编码器的设计问题。

The high speed design problem of RS encoder is discussed .

Turbo码编码器IP核设计及验证

Design and Verification of Turbo Encoding IP Core

叙述了旋转编码器在有轨缆车PLC控制系统中的应用。

Circumvolve coder application in the rail cable car PLC control system was discussed in this paper .

RS编码器IP核设计的难点是提高编码电路的编码运算速度。

The difficulty of RS encoder IP core design is how to improve operation rate of encoding circuit .

本系统使用了PLC内部专用的旋转编码器输入型高速计数器，实现了针灸机械手的运动控制。

This system realizes controlling the move of acupuncture manipulator by means of the inner high speed counter with quadrature encoder .

使用上述加法、乘法和求逆的基本电路单元，实现了RS编码器。

The RS encoding algorithm is implemented by using the basis cell which is mentioned above .

对RS编码器采用移位寄存器形式，来实现除法电路求得监督位。

Check bit of divide operation circuits of RS codes is realized by using shift registers .

基于ITU标准的CRC加卷积编码器的FPGA设计

A FPGA Design of CRC and Convolution Encoder Based on ITU Standards

文章给出了并行可重置Huffman编码器IP核的实现方案。

A design of reconfigurable parallel Huffman encoder IP core is given in this paper .

利用多级离子注入技术，一种新型的CMOS四值译码器与编码器被设计。

By using the multiple ion implantation technique , novel CMOS quaternary decoder and encoder are designed .

在以上新算法结构的基础上，用FPGA设计和实现了高性能的遥感图像压缩编码器硬件系统，并在我国的探月卫星上得到了应用。

Based on the new algorithms , a hardware system for remote sensing image compression was designed and implemented on FPGA .

数字视频编码器用DDS的设计与实现

The Design of a Direct Digital Synthesizer for Digital Video Encoders and Its Implementation

AVS-M编码器算法研究和解码器DSP移植和优化

The Research of AVS-M Encoder and Optimization of the Decoder

HDTV编码器测试系统的设计与硬件实现

Hardware Design and Implementation of the HDTV Encoder Testing System

MPEG-4高级层实时编码器优化

Optimization of real time MPEG-4 ASP encoder

HDTV视频编码器系统子图分割并行处理单元的设计与实现

Design of Sub-Picture Division and Parallel Processing Module for HDTV MPEG-2 Video Coders

HDTV视频编码器的动态图像组结构和码率分配策略

Bit Allocation Strategy for Parallel HDTV Video Encoder

基于Veriloghdl语言描述的卷积码编码器的设计

Design of Convolution Coder Described by Verilog HDL

HDTV视频编码器的并行处理结构

HDTV Video Encoder Based on Parallel Processing